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Please use this identifier to cite or link to this item:
http://hdl.handle.net/123456789/3031
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| Title: | Desain Pembangkit Pulsa Clock Non-OverIapping untuk AplikasiADC Pipeline I-bit/stage Menggunakan CMOS Teknologi AMS 0,35 |
| Authors: | Afandi, Hamzah
Pertiwi, Atit |
| Keywords: | multiplying.
pulse generators,
sampling
non - overlapping |
| Issue Date: | 24-Oct-2011 |
| Publisher: | Universitas Syiah Kuala |
| Abstract: | In this paper discussed about the pulse generator is important to the process of converting analog to digital. In the sampling phase and multiplying the address a clock pulse tomode that does not intersect
sampling |
| URI: | http://hdl.handle.net/123456789/3031 |
| ISSN: | 2088-9984 |
| Appears in Collections: | Published Article Teknologi Industri
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