Design, Simulation and Synthesis of 2-D Discrete Cosine Transform VLSI Chip for Image Compression

Abstract

This paper describes the use of Electronic Design Automation (EDA) for designing and synthesizing 2-D Discrete Cosine Transform(DCT) VLSI chip for image compression algorithm. The design flow starts with giving specifications of the system behavior toimplementation on silicon. The whole process is carried out using an advanced workstation based design environment for digital signalprocessing. The software allows the bit-true analysis to ensure the designed VLSI chip satisfying the required specifications. The bit-trueanalysis was performed on all levels of abstraction. The model was simulated in Aldec Active HDL 3.5 Environment. The VHDL model wassynthesized using synthesis tool for VLSI implementation. Finally, the processor netlist was mapped on a target technology using AlteraFLEX 10K. The designed codes of the DCT chip can be downloaded into FPGA demo board for testing the functionality. The fabricated chipcan be used for digital systems in particular to the industrial applications etc.